I would like to know if someone has implemented AVX Instruction Core Ratio Negative Offset option from ASUS X99-E-10GWS to ASUS X99-E WS. Good OC isnt much possible without this options, which afaik doesnt exist even on X99 Maximus boards

@swagger_1337 Do you have both boards? If yes, have you used same CPU in both boards?
From what I see, unless it's just plain hidden from you in the -E WS, it's only suppressed in the same way in both BIOS so if you can see in one but not the other than it's due to they simply hid it, not due to CPU type etc.
On your Main page of BIOS, can you see "Access Level" at the bottom? if yes, tell me what it says and I will send you mod BIOS.

If your board does not have USB Flashback, then do this >>
Check BIOS main page and see if ME FW version is shown, if not then download HWINFO64 and on the large window on left side, expand motherboard and find ME area, inside that get the ME Firmware version.
Once you have that, go to this thread and in the section "C" download the matching ME System Tools Package (ie if ME FW version = 10.x get V10 package, if 9.0-9.1 get V9.1 package, if 9.5 or above get V9.5 package etc)
Intel Management Engine: Drivers, Firmware & System Tools

Once downloaded, inside you will find Flash Programming Tool folder, and inside that a Windows or Win/Win32 folder. Select that Win folder, hold shift and press right click, choose open command window here (Not power shell).
At the command prompt type the following command and send me the created file to modify >> FPTw.exe -bios -d biosreg.bin

If you are stuck on Win10 and cannot easily get command prompt, and method I mentioned above does not work for you, here is some links that should help
Or, copy all contents from the Flash Programming Tool \ DOS folder to the root of a USB Bootable disk and do the dump from DOS (FPT.exe -bios -d biosreg.bin)
https://www.windowscentral.com/how-add-c...creators-update
https://www.windowscentral.com/add-open-...menu-windows-10
https://www.laptopmag.com/articles/open-...ator-privileges

@Lost_N_BIOS No i only have -E ws board. My acccess level is "Administrator" (i havnt change it). I understand what AVX offset stuff should be right on AI Tweaker page but it isnt :/ Many thanks for helping out

Thanks for the info, since you only have the -E WS, how do you know the other board BIOS had this option? Please show me image of your Ai Tweaker page, below all the "Core Ratio Limit and Core 0 count etc.
And, waiting on your BIOS region dump to send you mod BIOS, unless your board has USB Flashback (I didn't check). If you have USB Flashback then I can mod stock BIOS for you, if not then I need FPT dump as outlined above.

Zitat von Lost_N_BIOS im Beitrag #4

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how do you know the other board BIOS had this option?

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Makes sense, I thought maybe you used the other board, or someone showed you image etc. Do you know if all CPU's support that, or only certain ones etc? I've think I've enabled it before for someone and it worked, so probably just they hid in BIOS.

Here is mod BIOS then, use with USB Flashback only, do not flash this via FPT. Do not rename BIOS, put on root of USB formatted to FAT32, smaller/cheap USB works best, if USB or Flashback LED does not flash for 1 minute or more and get faster and faster then it's not working, try another USB (128MB-2GB often best)
Put only one BIOS at a time on root of USB (ie not in any folders) Flash BIOS in folder one first, then if no AVX Instruction Core Ratio Negative Offset shown, flash BIOS in folder 2, then if no luck still flash BIOS in folder three.
If you get the setting at BIOS 1-2, no need to continue further testing, these are only same mod done in different ways, test till you find method that makes visible then stop
If you see it show up, but no drop out menu for option, or place to enter setting, stop there and let me know which BIOS it appeared on and send me image of how it looks
http://s000.tinyupload.com/index.php?fil...251671753432844

@Lost_N_BIOS Flashed 2nd file and... man you are LEGEND screenshot

Zitat von Lost_N_BIOS im Beitrag #6

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Do you know if all CPU's support that, or only certain ones etc?

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@swagger_1337 - great to hear it's visible for you now, thanks for quick report back [thumbs-up] Now, for future reference, lets see some enabled/disable benchmark comparisons when you have time - thanks!


BTW, in case you want to make same edit to other X99 BIOS for anyone, or in future BIOS, this is an easy edit.

1. Open main stock BIOS.CAP file in UEFITool, click on main "Aptio Capsule" right click, extract body.
2. Open body in UEFITool, find setup module (in the main volume with all the "DXE" Modules, and expand that to extract it's "PE32" module as-is
3. Using Universal IFR extractor, extract IFR from the Setup modules PE32 file.
4. Open the IFR TXT and find the AVX Instruction Core Ratio Negative Offset entry, this you change as below, via hex editor
5. Once done with edit below, with UEFITool open BIOS body you extracted in step one, find the setup module again, expand, and replace the PE32 module as-is with your edited as-is module. Save as mod BIOSbody.rom/bin
6. Open stock BIOS.CAP in hex editor, open mod BIOSBody file and select entire contents and copy all, then on stock BIOS.CAP go to 800h location, and paste the modified BIOS body - then save as USB Flashback Name.CAP

Stock setting IFR, edit via hex

@Lost_N_BIOS thanks so much for sharing this iinformation. I am working on Asrock x99 Formula OC 3.1 http://asrock.pc.cdn.bitgravity.com/BIOS....1(3.80)ROM.zip

I found from UBU the setup module:

Find AMI Setup
AMI Setup in GUID 899407D7-99FE-43D8-9A21-79EC328CAC21
AMI Setup in GUID B1DA0ADF-4F77-4070-A88E-BFFE1C60529A
 
 

in the IFR text I see:

0x1E582 		Suppress If {0A 82}
0x1E584 			QuestionId: 0x279 equals value 0x2 {12 86 79 02 02 00}
0x1E58A 				Not {17 02}
0x1E58C 			End {29 02}
0x1E58E 			Gray Out If {19 82}
0x1E590 				QuestionId: 0x260 equals value 0x1 {12 06 60 02 01 00}
0x1E596 				One Of: Adjust Pll, VarStoreInfo (VarOffset/VarName): 0x17AE, VarStore: 0x2C, QuestionId: 0x15, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 FE 0A FF 0A 15 00 2C 00 AE 17 10 10 00 01 00}
0x1E5A7 					One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 E1 02 30 00 00}
0x1E5AE 					One Of Option: Enabled, Value (8 bit): 0x1 {09 07 23 03 00 00 01}
0x1E5B5 				End One Of {29 02}
0x1E5B7 				Numeric: {a1#AVX2 Negative Offset, VarStoreInfo (VarOffset/VarName): 0x17C5, VarStore: 0x2C, QuestionId: 0x16, Size: 1, Min: 0x0, Max 0x1F, Step: 0x1 {07 91 FC 0A FD 0A 16 00 2C 00 C5 17 10 10 00 1F 01}
0x1E5C8 					Default: DefaultId: 0x0, Value (8 bit): 0x0 {5B 06 00 00 00 00}
0x1E5CE 				End {29 02}
0x1E5D0 				Numeric: {a1#Pll Trim Offset, VarStoreInfo (VarOffset/VarName): 0x17AF, VarStore: 0x2C, QuestionId: 0x17, Size: 4, Min: 0xFFFFFFF1, Max 0xF, Step: 0x1 {07 9A 00 0B 01 0B 17 00 2C 00 AF 17 10 02 F1 FF FF FF 0F 00 00 00 01 00 00 00}
0x1E5EA 					Default: DefaultId: 0x0, Value (32 bit): 0x0 {5B 09 00 00 02 00 00 00 00}
0x1E5F3 				End {29 02}
0x1E5F5 				One Of: Link Frequency Select, VarStoreInfo (VarOffset/VarName): 0x1175, VarStore: 0x2C, QuestionId: 0x18, Size: 1, Min: 0x1, Max 0x7, Step: 0x0 {05 91 06 0B 07 0B 18 00 2C 00 75 11 10 10 01 07 00}
0x1E606 					One Of Option: 6.4GB/s, Value (8 bit): 0x1 {09 07 0A 0B 00 00 01}
0x1E60D 					One Of Option: 8.0GB/s, Value (8 bit): 0x3 {09 07 0B 0B 00 00 03}
0x1E614 					One Of Option: 9.6GB/s, Value (8 bit): 0x5 {09 07 0C 0B 00 00 05}
0x1E61B 					One Of Option: Auto, Value (8 bit): 0x6 (default) {09 07 08 0B 30 00 06}
0x1E622 					One Of Option: Auto Limited, Value (8 bit): 0x7 {09 07 09 0B 00 00 07}
0x1E629 				End One Of {29 02}
0x1E62B 			End If {29 02}
0x1E62D 		End If {29 02}
 
 

Please tell me what mod is required to enable the AVX offset.

Thanks!

@lev - Be sure you edit the AVX entry down at OC Tweaker section, not the one at top in "my Favorites"
This edit will make all four of those settings visible to you

Suppress If {0A 82}
0x2AC3E QuestionId: 0x279 equals value 0x2 {12 86 79 02 FF 00}
0x2AC44 Not {17 02}
0x2AC46 End {29 02}
0x2AC48 Gray Out If {19 82}
0x2AC4A QuestionId: 0x260 equals value 0x1 {12 06 60 02 FF 00}

Awesome, I am out of town for the week but can hardly wait to try it when I get back. I will post the results as requested ;)

@lev - Good luck, let me know if you can't get it and I can do for you.

Zitat von Lost_N_BIOS im Beitrag #12

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@lev - Good luck, let me know if you can't get it and I can do for you.

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Intel (R) Flash Programming Tool. Version:  9.1.10.1000
Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
 
Platform: Intel(R) C610 Series Chipset
Reading HSFSTS register... Flash Descriptor: Valid
 
    --- Flash Devices Found ---
    MX25L12805D    ID:0xC22018    Size: 16384KB (131072Kb)
 
Error 26: The host CPU does not have read access to the target flash area. To enable read access for this operation you must modify the descriptor settings to give host access to this region. 
 

I have the following ME status from MEInfoWin64.exe

Intel(R) MEInfo Version: 9.1.45.3000
Copyright(C) 2005 - 2017, Intel Corporation. All rights reserved.
 
Intel(R) ME code versions:
 
BIOS Version:                           P3.80
MEBx Version:                           0.0.0.0000
Gbe Version:                            0.1
VendorID:                               8086
PCH Version:                            5
FW Version:                             9.1.37.1002 H
LMS Version:                            Not Available
MEI Driver Version:                     11.7.0.1045
Wireless Hardware Version:              Not Available
Wireless Driver Version:                Not Available
 
FW Capabilities:                        0x40100940
 
    Intel(R) Capability Licensing Service - PRESENT/ENABLED
    Intel(R) Dynamic Application Loader - PRESENT/ENABLED
    Service Advertisement & Discovery - PRESENT/ENABLED
 
TLS:                                    Disabled
Last ME reset reason:                   Power up
Local FWUpdate:                         Enabled
BIOS Config Lock:                       Disabled
GbE Config Lock:                        Disabled
Host Read Access to ME:                 Disabled
Host Write Access to ME:                Disabled
SPI Flash ID #1:                        C22018
SPI Flash ID VSCC #1:                   20452045
SPI Flash BIOS VSCC:                    20452045
BIOS boot State:                        Post Boot
OEM Id:                                 00000000-0000-0000-0000-000000000000
Capability Licensing Service:           Enabled
OEM Tag:                                0x00000001
Localized Language:                     Unknown
Independent Firmware Recovery:          Enabled
 

Can you kindly recommend the best method to flash the modified BIOS or what other information I should provide to ascertain that direction?

Thanks!

@lev - Two things, you can do this with stock BIOS and Instant Flash
Second, if you wanted to use FPT you can, but then ONLY you can use the resulting BIOS file. For that you need to use this command to dump BIOS region >> FPTw.exe -bios -d biosreg.bin (And then this to flash it back >> FPTw.exe -bios -f modbiosname.bin)
Also, unsure if you can use .DMP as filenames with FPT, maybe? Best to stick with .BIN just in case, if you use FPT.

But, it's best to just edit the stock BIOS and Instant Flash it. To do this, take stock BIOS and run through UBU program, but do not make any changes, then save as "mod name"
Then, edit that file, then instant flash it. You can probably do this with your already modified file too. UBU removes the security capsule hidden in the BIOS.
If you'd rather not do this yourself, and want me to do it, send me your mod BIOS and I will manually FF the capsule.

@Lost_N_BIOS,

Thank you for confirming instant flash should work. I was doing MC update with UBU as well. After flashing MC updated BIOS, the system would refuse to boot with Dr. Debug code 04 displayed. When I just opened and saved BIOS in UBU. I could flash that UBU saved version with instant flash. I then made the AVX mod on the UBU saved version of the BIOS. That also flashed with instant flash. However, when in the BIOS, I still do not see the enabled settings allowing AVX offset configuration.