Forum - RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations

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#16 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Sep 28, 2018 12:56 am (Last edited: Fri Sep 28, 2018 12:57 am)

The proper SPI image is "W6702MB.A09". The SPI image included within the larger phlash file ("W6702M.A09") has an older GbE firmware and various debug settings enabled in the Flash Descriptor. The VSCC tables are the same at both. However, some of those debug options could easily be the cause of you issue. So re-flash the entire SPI chip manually using "W6702MB.A09" file.

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#17 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Sep 28, 2018 1:11 am (Last edited: Fri Sep 28, 2018 2:45 am)

First off, thank you for your time! W6702M.A09 is the production BIOS file but it's screwy.

I cannot flash W6702MB.A09 as Phlash.exe (Link below for WinPhlash to reproduce the error that I get in DOS) will not accept it. Says missing descriptors and errors out. W6702M.A09 is the production file that the Dell (phlash) tool puts onto the system. Command from f.bat is "phlash16 W6702M.A09 /mode=3 /bbl /c /s /exit"

It is quite strange that the production BIOS has the Read/Write settings different than the "source" W6702MB.A09 file (i.e. offset 40062h 40063h set as FF FF vs. offset 62h 63h as 0B 0A) But that explains why I had read/write access to the ME region when I tried to swap in older or newer ME ignition firmware.

What is puzzling to me is that looking at W6702M.A09 VSCC table (offset 40EF0h) it does have the proper 2009 VSCC setting for the SPI hardware on the board ( BF254A ) but the board itself reports 2019 after flash, that 2019 output is reported by MEManuf.

Side note: If I open W6702M.09 in FITC tool and check the VSCC table it lists AT26DF321 (1F4600 and settings 2015, perhaps an artifact?) I am shocked too that the source W6702MB has different Gbe firmware from what the stock dell tool places on the system.

Next Steps: I am now editing the W6702M.A09 to see if I can "force" the VSCC to be the 2009 by removing other SPI entries. I do notice that W6702M or W6702MB differ on PCH2 strappings. (W6702MB actually seems to have debug settings enabled)

WinPlash x64 link: https://www.wimsbios.com/files/flashers/...sh64-1.0.76.zip

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#18 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Sep 28, 2018 1:59 pm

I order to do any useful comparisons between the two SPI images you need to first manually extract the debug SPI image from W6702M.A09 by finding the Flash Descriptor offset and copying the next 0x200000 (2MB) of data. Once you do that you can load each in FITC, save the configuration xml, format it properly and comparing the results. You will then clearly see that W6702M.A09 has the FD unlocked and some ME debug settings enabled as well as an older GbE firmware.

You cannot use phlash to flash W6702MB.A09 back because that utility expects its own structure like we see at W6702M.A09. So that's why I said that you need to manually re-flash the SPI image via Flash Programming Tool (if your FD is unlocked) or via a hardware programmer. As long as we have the proper/stock SPI image, which is W6702MB.A09, it doesn't matter what is currently flashed, why it differs, why the phlash image includes a debug image (probably a mistake by Dell or maybe the phlash command flashes the BIOS region only which is the same) etc.

Since you say that your FD is unlocked we can fix everything manually by re-flashing the FD and ME regions via FPT. I took W6702MB.A09 and followed [Guide] Clean Dumped Intel Engine (CS)ME/(CS)TXE Regions with Data Initialization to clean & update the ME firmware. I also set the FD to be unlocked so that you can re-flash if required. The end result is W6702MB.A09_New SPI image. From that I extracted the FD and ME regions which can be re-flashed via FPT as follows:

fptw -desc -f fd.bin
fptw -me -f me.bin
fptw -greset

After the reboot, the ME should be operational and updated.

plutomaniac has attached files to this post

M15R1A09_New.rar

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#19 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Sep 28, 2018 7:12 pm (Last edited: Fri Sep 28, 2018 8:10 pm)

You rock. Yes, I found that phlash was only doing the BIOS region per decoding flags so old Gbe did not matter.

I will disassemble the system to get to the SPI and externally flash. I was dorking around with the settings using fptw and thought locking the SPI might help. Nope.

Prior to that I did fptw -DESC -D desc.bin and checked the VSCC it was set to 2009 but MeManuf still claims 2019. I tried to adjust the issue with fptw -DES -F desc_edit.bin. On reboot the ME fw complained as usual and the 2019 was reported by MeManuf. Very odd!

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#20 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Sep 28, 2018 11:27 pm

Alright, flashing externally is much better. Keep a backup to be sure and then flash the _New image to see if that works at least.

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#21 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Tue Oct 02, 2018 6:35 am (Last edited: Tue Oct 02, 2018 8:57 pm)

2CPU

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Posts:	21
Registered since:	09.26.2018

Good thing I did save the full backup. It appears 2MB is used for BIOS and other 2MB probably the EC code. I almost soldered back the chip with 2nd region all Fs. What is frustrating is that MeManf still thinks the VSCC is programmed to 2019. I verified the VSCC is correct now via fptw dump and viewing. Do I need to add JEDEC ID and VSCC settings for the 2MB version that this SPI is "pretending" to be? (guessing on boot no VSCC matches and defaults to 2019 since nothing in the SPI has 2019)

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Intel(R) MEManuf Version: 6.0.40.1214
Copyright(C) 2005 - 2010, Intel Corporation. All rights reserved.
 
Platform stepping value is 3
 
Ignition firmware is detected on the system.
FW Status Register: 0xE2110605
FW Status Register1: 0x000B0007
 
vsccommn.bin was created on 00:29:16 07/16/2009 GMT
  Ignition FW Status(FAD_IDX):      Using Data from Factory Default Image
  Ignition FW Status(BOOT_IMAGE):   FW booted from Factory Default Image
  Ignition FW Status(EVENT_LOG):    Event Log is empty
  Ignition FW Status(ICC_STS):      Clock programming successful
  Ignition FW Status(CF):           Processor feature configuration successful
  Ignition FW Status(SWC):          SWC application successful
  Ignition FW Progress:             Intel(R) ME is sleeping
 
Factory Default Partition Data is validated and healthy.
Runtime Partition Data is validated and healthy.
Factory Default Partition Code is validated and healthy.
Runtime Partition Code is corrupted.
 
Error 9271: Flash ID 0xBF254A Intel(R) BIOS VSCC value mismatch
Programmed value of 0x2019 doesn't match the recommended value of 0x2009
See PCH SPI programming Guide for more details
FPBA value is 0x0
 
FRAP register value is 0x0000FFFF
Flash Master1 (Host/BIOS) value is 0xFFFF0000
Flash Master2 (ME) value is 0xFFFF0000
Flash Master3 (Gbe) value is 0xFFFF0118
 
Error 9279: SPI flash Intel(R) ME region is not locked
 
Error 9280: Intel(R) Gbe/ME has read or write access to BIOS region
 
Error 9281: SPI flash descriptor region is not locked
 
Error 9283: Region access permissions don't match Intel recommended values
 
Ignition Runtime Image FW version: 0.0.0.0
Ignition Factory Default Image FW Version: 6.0.20.1185
 
Error 9286: Ignition firmware check was not successful
 

BTW I found and read the 5 series chipset PCH SPI programming guide (doc # 403598). Very neat and has a section about disabling the ME ignition firmware just like your post. Its an Intel doc but can find it as PDF hosted via a search.

Is the issue the greset not working?

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Intel (R) Flash Programming Tool. Version: 6.0.40.1214
Copyright (c) 2007-2010, Intel Corporation. All rights reserved.
 
Platform: Intel(R) 5 Series Chipset Revision: B0
Reading HSFSTS register... Flash Descriptor: Valid
 
	--- Flash Devices Found ---
	SST25VF032B	ID:0xBF254A	Size: 4096KB (32768Kb)
 

Warning: There are some addresses that are not defined in any regions.
Read/Write/Erase operations are not possible on those addresses.
 
Could not set the GlobalReset bit
 
Error 205: Failure. Unexpected error occurred.
 

I've ordered some AT26DF321 since that pn weirdly appeared in the original BIOS when opening the M file with FITC. I think the schematics calls for SST25VF016B (0xBF2541) vs. the found SST25VF032B (0xBF254A) but both are in VSCC.....

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#22 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Wed Oct 03, 2018 2:26 pm

There should be one SPI chip which starts with an Intel Flash Descriptor and that's the one we're looking for. Use the programmer to re-flash it using the previously attached fixed/updated SPI image and we'll go from there.

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#23 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Wed Oct 03, 2018 10:52 pm (Last edited: Thu Oct 04, 2018 12:47 am)

Yes I found that SPI with the Intel start flash descriptor at offset 10. (valid for ES2 and production chipset)

That descriptor has bf 25 41 & bf 25 4A VSCC entries which are programmed with 2009. But then the MeManuf tool gives the output above in post #21

Is there any other ME tools that can view the VSCC? Reading the SPI it's correct:

Zitat
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 5A A5 F0 0F 02 00 04 03 06 02 10 10 20 00 00 00 1A 00 30 09 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 00 00 00 00 30 00 FF 01 03 00 2F 00 01 00 02 00 FF 0F 00 00 FF FF FF FF FF FF FF FF FF FF FF FF 00 00 FF FF 00 00 FF FF 18 01 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 82 57 30 08 0F 00 00 00 00 00 00 91 00 00 00 00 02 E1 C8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0D 00 00 44 00 01 00 97 00 00 99 00 00 00 00 00 00 00 00 00 00 00 00 58 03 00 00 FF FF FF FF FF FF FF FF FF FF FF FF FF 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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 1F 47 00 00 15 20 15 20 BF 25 4A 00 09 20 09 20 BF 25 41 00 09 20 09 20 EF 40 15 00 05 20 05 20 FF FF FF FF FF FF FF FF FF FF FF FF ED 08 00 00

Is there something that is intercepting and altering the VSCC to stop the execution? "Runtime Partition Code is corrupted."

20h -> Lower block/sector erase size set to 4 KB
09h -> Upper write enable on Write status & Upper block/sector erase size set to 4KB

No where do I even see 19h but that's byte 5 asserted in Reserved area. I thought FITC generates FLIMAP1 so don't think that is wrong. (offset EFCh ->ED 08 )

Update: Ok reading doc#403598 I found section 4.4.3 that details VSCC setting of "0x20012001, 0x20192019 or 0x20112011 will result in slower Intel ME Firmware performance" but doesn't specify that it is invalid or why my platform could think to use that.

Perhaps just need to swap the SPI to a AT26DFxxx1 part to match up to this mysterious 2019 single byte write capable VCSCC setting.

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#24 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Thu Oct 04, 2018 2:00 pm

I'm confused, have you actually re-flashed the SPI chip with the above image?

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#25 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Thu Oct 04, 2018 8:31 pm (Last edited: Thu Oct 04, 2018 8:42 pm)

I flashed the descriptor you uploaded. I even read it back out of the chip and it's the same. Above I removed a few ending FF but same as read file.

That's why I am confused too. "vsccommn.bin was created on 00:29:16 07/16/2009 GMT" looks all valid but runtime partition is corrupted and the ME ignition fw does not execute and defaults. Trying to fix it.

It is almost as if there is some runtime registers that loads up 0x20192019 and not from the SPI. Thus looking to swap the SPI chip to one that actually does support this VSCC setting and hope it's a work around?

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#26 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Oct 05, 2018 12:10 am

I think that VSCC is controlled by BIOS as well but I don't remember exactly. Did you flash the FD only? In order to rule out any other possibility, flash the entire 2MB image into the chip to have proper/intended FD, BIOS and ME regions in place. If it still happens after that then clearly the BIOS is doing something. But to reach that conclusion for sure the entire chip should be re-flashed. There is no harm, you have both a backup and a programmer.

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#27 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Oct 05, 2018 12:44 am (Last edited: Fri Oct 05, 2018 1:02 am)

I did perform that full replacement and external flash. It's totally crazy that the VSCC from the SPI does not match what MeManuf is checking. I really hope I am missing something somewhere a register is configured wrong. There is a section about the upper and lower VSCC registers that I believe exist in memory after BIOS boot.

I am thinking I *might* succeed if I swap to the JDEC spi chip that can accept 2019 setting. Unless you know of other regions to check for this 2019 settting?

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#28 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Oct 05, 2018 1:24 am (Last edited: Fri Oct 05, 2018 1:25 am)

Despite what MEManuf says, do you still have the initial problem? I supposed that yes you can replace the SPI chip and it will accept it but I don't see why that must be done, seems weird. You are certain that your current SPI chip IDs are in VSCC, right? To know everything there is, you can read the documentation from that generation. For example, from what I can see at the 5-series PCH Guide:

Zitat
The Intel ME VSCC Table holds the JEDEC ID and the ME VSCC information for all the Serial Flash part(s) supported by the NVM image. This table is NOT used by Intel ME Ignition FW only. BIOS and GbE write and erase capabilities depend on LVSCC and UVSCC registers in SPIBAR memory space.

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#29 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Fri Oct 05, 2018 9:01 pm (Last edited: Fri Oct 05, 2018 9:04 pm)

SPIBAR is what I think is the issue. The initial "Me firmware is corrupt, reflash your BIOS" (or something close) is still present and what I want to solve.
I assumed the descriptor region was just setup wrong and that any factory update was only doing BIOS region. Sadly that assumption was only partially correct and with the updated desc the problem still exists!

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#30 | RE: Remove ME 6.0 Ignition firmware completely & Panther Point PCH observations datum

Sun Oct 07, 2018 11:36 pm (Last edited: Sun Oct 07, 2018 11:37 pm)

So looking at the later ME info packages they can check the BIOS VSCC setting but I don't get that output on the 6 series:

Borrowed this below output from the later tool: (not my system)
MEI Driver Version: 10.0.30.1054
Wireless Hardware Version: Not Available
Wireless Driver Version: Not Available

FW Capabilities: 0x01101C40

Intel(R) Capability Licensing Service - PRESENT/ENABLED
Protect Audio Video Path - PRESENT/ENABLED
Intel(R) Dynamic Application Loader - PRESENT/ENABLED

CPU Upgrade State: Not Upgradable
Cryptography Support: Disabled
Last ME reset reason: Power up
Local FWUpdate: Enabled
BIOS Config Lock: Enabled
GbE Config Lock: Enabled
Host Read Access to ME: Enabled
Host Write Access to ME: Enabled
SPI Flash ID #1: EF4017
SPI Flash ID VSCC #1: 20052005
SPI Flash BIOS VSCC: 20052005

What offset is that bolded line above on the ME ignition v6?

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ME N/A at Z97 ASUS Maximus Hero VII � � TXE 1 clean dump problem

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